UML modeling and formal verification of control/data driven Embedded Systems
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Date
2009
Journal Title
Journal ISSN
Volume Title
Publisher
IEEE
Abstract
In this paper, we present our approach for UML
based modeling of control/data driven Embedded Systems. In
our case application is presented as a network of hierarchic
data driven and control driven tasks that communicate via
abstract channels. Hardware platform is modeled as UML
structure diagram. Mapping of application on hardware
platform is modeled through UML constraints. From UML
models, a Maude specification is generated. We use this formal
specification to formally validate system functionality against
some undesirable properties and to estimate system power
consumption at a high level of abstraction.
Description
Keywords
UML, Embedded systems, Rewriting logic, Maude, Power Consumption, Power consumption, Formal verification